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HP 32S: Difference between revisions
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The HP 32S was powered by a silicon-on-sapphire Saturn processor code named "Sacajawea" manufactured by NEC of Japan, with 512bytes built in RAM and 16KB built in ROM, clocked at 640kHz, shared with other mid-ranged pioneers (HP-14B, HP-22S) | The HP 32S was powered by a silicon-on-sapphire Saturn processor code named "Sacajawea" manufactured by NEC of Japan, with 512bytes built in RAM and 16KB built in ROM, clocked at 640kHz, shared with other mid-ranged pioneers (HP-14B, HP-22S) | ||
The HP 32S sports a single shift key and thus most of its functions are driven via menus. Only single character alphabetical labels and variable registers are allowed. All instructions can be displayed (instead of their keycodes) and merged (e.g. RCL+ is considered one instruction), significantly improving ease-of-use. However, with only 384 bytes are available, and as each intruction and integer from 0-99 uses 1.5 bytes whereas all other numbers use 9.5bytes, programming complexity is extremely limited. | The HP 32S sports a single shift key and thus most of its functions are driven via menus. Only single character alphabetical labels and variable registers are allowed. All instructions can be displayed (instead of their keycodes) and merged (e.g. RCL+ is considered one instruction), and error messages are verbose, significantly improving ease-of-use. However, with only 384 bytes are available, and as each intruction and integer from 0-99 uses 1.5 bytes whereas all other numbers use 9.5bytes, programming complexity is extremely limited. | ||
It also featured a RPN solver, capable of evaluating and finding zero of functions (given as programs) numerically, given initial assumptions. | It also featured a RPN solver, capable of evaluating and finding zero of functions (given as programs) numerically, given initial assumptions. | ||
Notably, HP 32S introduced built-in support for complex numbers in the form of unified stack, with CMPLX prepending operations resulting in the complex variant of each operation, using two stack levels to represent one complex value (arithmetic only in X+iY rectangular form, although conversion to polar form is provided), thus reducing the four level real stack to 2 levels. This differs from HP 15C as there is no explicit complex mode (and normal operations resulting in complex result would still rasie errors) as well as the HP 41C (and more primitive Pioneers like the HP-20S) as it does not rely upon user programs to handle complex operations, thus eating into precious programming space. Somewhat unintuitively, the imaginary part is entered before the real part. | |||
== HP 32SII == | == HP 32SII == | ||
Code named "Nardo", HP 32SII is considered a further cost-reduced version of HP 32S. It was introduced on the 1st March 1991, and discontinued by September 2002 (until NEC was unable to continue manufacture of Saturn architecture chip). Instead of the elaborate silicon-on-sapphire exposed-die chip held down by plastic, it switched to a more conventional looking plastic wrapped chip design. It is believed the architecture remained the same otherwise. All HP32SII had the later variant | |||
[[Category:Scientific calculator| ]] | [[Category:Scientific calculator| ]] | ||
[[Category:HP| ]] | [[Category:HP| ]] | ||