HP 42S: Difference between revisions

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fast mode annotated
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[[Category:RPL| ]]
[[Category:RPL| ]]
{{Infobox calculator|name=HP 42s|type=[[Scientific calculator]]|introduced=1988|discontinued=1995|successor=[[HP 32S]], [[HP 48SX]]|predecessor=[[HP 41C]]|display_type=Dot-Matrix LCD}}
{{Infobox calculator|name=HP 42s|type=[[Scientific calculator]]|introduced=1988|discontinued=1995|successor=[[HP 32S]], [[HP 48SX]]|predecessor=[[HP 41C]]|display_type=Dot-Matrix LCD}}


The '''HP42s''' is a high-end RPN calculator in the HP Pioneer line. Launched in 1988, It was originally meant as a [[HP 41C]] replacement and thus had FOCAL compatibility, capable of running most HP 41C programs with little modification. However it was hampered in this role due to its lack of extensions and limited I/O capabilities, and was discontinued early (as compared to [[HP 17B]]) in favour of [[HP 48SX]] in 1995.
The '''HP42s''' is a high-end RPN calculator in the HP Pioneer line. Launched in 1988, It was originally meant as a [[HP 41C]] replacement and thus had FOCAL compatibility, capable of running most HP 41C programs with little modification. However it was hampered in this role due to its lack of extensions and limited I/O capabilities, and was discontinued early (as compared to [[HP 17B]]) in favour of [[HP 48SX]] in 1995.
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== Hardware Mods ==
== Hardware Mods ==
[http://www.finetune.co.jp/~lyuka/interests/calc/hp42s/ Some users] have reported success replacing the RAM chip of their HP 42s with up to 32KB of RAM and modifying the LC circuit to force the chip to run at twice the clock speed. However it must be noted due to the construction of Pioneers calculators, opening a HP 42s involves drilling heat-stakes and thus will irreversibly reduce its structural integrity.  
[http://www.finetune.co.jp/~lyuka/interests/calc/hp42s/ Some users] have reported success replacing the RAM chip of their HP 42s with up to 32KB of RAM and modifying the LC circuit to force the chip to run at twice and even quadruple the clock speed. However it must be noted due to the construction of Pioneers calculators, opening a HP 42s involves drilling heat-stakes and thus will irreversibly reduce its structural integrity.  


== Tricks ==
== Tricks ==
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== Memory Layout ==
== Memory Layout ==
In the process of having its [https://www.finseth.com/hpdata/hp42s.php ROM dumped] and [https://www.hpmuseum.org/cgi-sys/cgiwrap/hpmuseum/articles.cgi?read=266 emulators developed] (and many exploration prior) the memory layout of the HP-42s is generally well know:
In the process of having its [https://www.finseth.com/hpdata/hp42s.php ROM dumped] and [https://www.hpmuseum.org/cgi-sys/cgiwrap/hpmuseum/articles.cgi?read=266 emulators developed] (and many exploration prior) the memory layout of the HP-42s became generally well know:
{| class="wikitable"
{| class="wikitable"
|+Memory Layout of HP-42s  
|+Memory Layout of HP-42s (both side inclusive)
(both side inclusive)
!
!
!
!Address Start (hex)
!Address Start (hex)
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|-
|-
|ROM
|ROM
|64KB ROM internal to the Lewis chip
|00000
|00000
|1FFFF
|1FFFF
|ROM
|ROM
|Executing from 00000 is the only way to exit the debugger without using a reset.
|Executing from 00000 is the only way to exit the debugger without using a reset (and thus pressing the ON key).
Executing from 023F1 (default entry point for debugger) displays the software revision and a one byte warm-start log. (often erroneously reported along with revision, e.g. A7, C5.....)
Executing from 023F1 (default entry point for debugger) displays the software revision and a one byte warm-start log. (often erroneously reported along with revision, e.g. A7, C5.....)
|-
|-
| rowspan="2" |Display
| rowspan="2" |Display (URAM)
| rowspan="2" |
|40000
|40000
|4020B
|4020B
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| rowspan="2" |Other Hardware
| rowspan="2" |Other Hardware
Registers
Registers
| rowspan="2" |
|40300
|40300
|4030F
|4030F
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|8 nibbles, counts down at 8192 ticks per second
|8 nibbles, counts down at 8192 ticks per second
|-
|-
| rowspan="7" |RAM
| rowspan="4" |RAM
|50000
(DRAM)
|5FFFF
| rowspan="4" |50000-5FFFF
|RAM
by default 8K repeated 4 times, however a single 32KB 28-pin 300mil SOIC SRAM chip could be soldered and correctly recognized.
|by default 8K repeated 4 times, however a single 32KB 28-pin 300mil SOIC SRAM chip could be soldered and correctly recognized.
|-
|50082
|50082
|50083
|50083
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|Pointers
|Pointers
|Three five nybbles pointers to top of stack, to program END, to REGS variables and then rest of variables list respectively.
|Three five nybbles pointers to top of stack, to program END, to REGS variables and then rest of variables list respectively.
|-
|503F6
|503F7
|Alpha length
|Length of the string stored in ALPHA register
|-
|502F8/
503F8
|5044F/
5044B
|Alpha register
|May be version dependent
|}
|}
== Fast Mode ==
On all revisions of HP-42s there is a one nybble speed variable at memory location 40300 that is set everytime the EXIT(On) key is pressed to 7h. Changing this nybble using the debugger will alter the speed at which HP-42s until EXIT(On) key is pressed for any reason. Setting this nybble to Fh will effectively double the speed at which HP-42s perform calculations and is of major utility when using SOLVER or doing numerical integration. A program is also available to help set this mode automatically on revision A machines when a certain program is XEQ-ed.
An abridged and annotated version of the fast mode procedure is produced below, with reference to the [https://www.rskey.org/gene/hpgene/hp42fast.htm original guide]:
# Memory modification using debugger (applicable to all revisions):
## EXIT + LOG (D) then <- (Backspace) to enter debugger.
## Navigate to memory address 40300 using Up/Down, Divide/Multiply, Substract/Add keys, note the leftmost value should be "7"
## Write one nybble using keyboard (0h-9h) and top row keys (Ah-Fh) to set desired speed, linearlly scaling with 7h as normal speed. ON key cannot be pressed starting from this step.
## Navigate to memory address 00000, see step 1.2. then press "." (decimal point) to execute from that location. "Machine Reset" should appear.
## Verify machine speed has been modified using BEEP command.
# Use Bug 2 (see Known Bugs) to automate setting of this mode (applicable to A revision):
## modify speed variable using method outlined in Step 1.
## Shift+Backspace (CLEAR) then choose "REGS", deleting the variable matrix.
## Press Sigma+ (A key), "Invalid Type" error should appear.
## key in 16248, then RCL IND STX (keystrokes: RCL, "." (decimal point), A, "." (decimal point), B). This will recall the nybble at address (16248+184) x 16=40300 which we just modified.
## STO "FAST", store the value we just retrieved for future use in variable "FAST".
## Create a program as listed below, optionally named "FAST":<syntaxhighlight lang="text" line="1" start="00">
{59-Byte program} # automatically generated
LBL "FAST"
SIGN              # operation to put stack X into last X register
SF 25            # sets the Error Ignore flag
CLX
RCL "REGS"        # recall the "REGS" matrix, backing it up in stack X
SIZE 00
SF 25
SIGMA+
8124              # indirect pointer for indirect STO to write to, correspond to memory 40300h
X<> "FAST"        # swaps stack X and "FAST", this is the nybble data we edited earlier
STO IND "FAST"    # indirectly store to patch memory 40300h
X<> "FAST        # store the nybble data back into "FAST"
Rv                # rolldown, put backed up "REGS" into X level
SF25             
STO "REGS"        # restores the "REGS" variables as before execution
Rv
LASTX            # recalls the last X register
.END.            # automatically generated
</syntaxhighlight>Note that the above program does not preserve register T due to successive roll downs.
## Execute above program. "Machine Reset" should appear. Verify machine speed has been successfully modified using "BEEP" command.
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