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HP 42S: Difference between revisions
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There are only two known bugs on the HP 42s. | There are only two known bugs on the HP 42s. | ||
The first HP-42s bug relates to the COMB (combination) and PERM (permutation) instructions. Nominally these two instructions calculates C(y,x) = y!/(x!*(y-x)!) and P(y,x) = y!/(y-x)!. Since factorial is strictly positive, an input of x<y correctly raises "Invalid Data" error. However this error flag is not correctly cleared, for example when using x<>y and executing the respective command again, and will require an arbitrary arithmetic operation to correctly clear (for example 0 +). This bug has been reported in all revisions except some mid-serial-range revision A machines, and is believed to be a software-hardware interfacing issue. A simple workaround is to always to prepend the command with x<y? x<>y (check if x<y and swap if true). | The first HP-42s bug relates to the COMB (combination) and PERM (permutation) instructions. Nominally these two instructions calculates C(y,x) = y!/(x!*(y-x)!) and P(y,x) = y!/(y-x)!. Since factorial is strictly positive, an input of x<y correctly raises "Invalid Data" error. However this error flag is not correctly cleared, for example when using x<>y and executing the respective command again, and will require an arbitrary arithmetic operation to correctly clear (for example 0 +). This bug has been reported in all revisions except some mid-serial-range revision A machines, and is believed to be a software-hardware interfacing issue, specifically, the hardware XM flag used for this error is not cleared explicitly in software but seems to rely on a hardware operation to reset. A simple workaround is to always to prepend the command with x<y? x<>y (check if x<y and swap if true). | ||
The second HP-42s bug is far more interesting: All register values are stored in a matrix called "REGS" on HP-42s. If one were to delete this matrix and then execute a statistic input (i.e. CLV "REGS" then Sigma+), forcing an "Invalid Type" error, RCL and STO in this state will, instead of recalling and storing to registers, directly read from and write to memory. The memory location RCL will read from is calculated as (RegisterNbr + 184) x 16 converted to hexadecimal, and the location STO will write to is (RegisterNbr x 2 + 184) x 16. Sometimes the offset is also reported as +183 which is due to how resgister on HP-42s is numbered from 00 to 99 and up to the value in SIZE. In that case R00 would count as the first register. | The second HP-42s bug is far more interesting: All register values are stored in a matrix called "REGS" on HP-42s. If one were to delete this matrix and then execute a statistic input (i.e. CLV "REGS" then Sigma+), forcing an "Invalid Type" error, RCL and STO in this state will, instead of recalling and storing to registers, directly read from and write to memory. The memory location RCL will read from is calculated as (RegisterNbr + 184) x 16 converted to hexadecimal, and the location STO will write to is (RegisterNbr x 2 + 184) x 16. Sometimes the offset is also reported as +183 which is due to how resgister on HP-42s is numbered from 00 to 99 and up to the value in SIZE. In that case R00 would count as the first register. | ||
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|+Memory Layout of HP-42s | |+Memory Layout of HP-42s | ||
(both side inclusive) | (both side inclusive) | ||
! | |||
!Address Start (hex) | !Address Start (hex) | ||
!Address End (hex) | !Address End (hex) | ||
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!Note | !Note | ||
|- | |- | ||
|ROM | |||
|00000 | |00000 | ||
|1FFFF | |1FFFF | ||
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Executing from 023F1 (default entry point for debugger) displays the software revision and a one byte warm-start log. (often erroneously reported along with revision, e.g. A7, C5.....) | Executing from 023F1 (default entry point for debugger) displays the software revision and a one byte warm-start log. (often erroneously reported along with revision, e.g. A7, C5.....) | ||
|- | |- | ||
| rowspan="2" |Display | |||
|40000 | |40000 | ||
|4020B | |4020B | ||
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from 40218 to 4024D each word controls multirow, shift, printing, busy, battery low, G and RAD (together forming GRAD) annunciators respectively. | from 40218 to 4024D each word controls multirow, shift, printing, busy, battery low, G and RAD (together forming GRAD) annunciators respectively. | ||
|- | |- | ||
| rowspan="2" |Other Hardware | |||
registters | |||
|40300 | |40300 | ||
|4030F | |4030F | ||
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|8 nibbles, counts down at 8192 ticks per second | |8 nibbles, counts down at 8192 ticks per second | ||
|- | |- | ||
| rowspan="8" |RAM | |||
|50000 | |50000 | ||
|5FFFF | |5FFFF | ||
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|Alpha register | |Alpha register | ||
|May be version dependent | |May be version dependent | ||
|- | |||
|50450- | |||
| | |||
| | |||
|May be flag registers, unable to confirm | |||
|} | |} | ||